Duration: 1:08:46

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This talk introduces the audience to a novel design methodology that addresses the correctness and reliability challenges of deep-submicron silicon. The focus is on a new design strategy, called Better Than Worst-Case design, which couples complex design components with simple robust checker mechanisms. By delegating the responsibility of correctness and reliability to the checker, it becomes possible to quickly build designs that are provably correct and that effectively address performance and reliability concerns. Two exemplary better than worst-case designs will presented: DIVA and Razor. DIVA is a functional checker for a complex microprocessor, capable of correcting faults caused by transients, silicon defects and design errors. Razor is a low-power pipeline that utilizes circuit-level timing error correction to eliminate voltage margins and minimize energy demands. In addition, a complementary design technique, called typical-case optimization (TCO), is introduced as a way to take advantage of the relaxed design constraints on fully checked designs.