CPU Lab - From NAND To Tetris, Part 7

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At long last, we begin building the schematic for our CPU.

*ERRATA*: Alert viewer Ivan points out that the selector for our mux that outputs to the "aIn" tunnel is incorrect - we are using cDestA as a selector, when we should be using cType! Thank you for the correction, Ivan.







Tags:
digital circuit design
cpu design
assembly language
machine language
NAND to Tetris