From NAND To Tetris, Part 4 - Arithmetic Logic

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United States Tea Leaves
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Duration: 5:41
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We briefly review binary notation, review the two's complement representation of negative numbers, and give some hints for implementing adders and the Arithmetic Logic Unit (ALU). If you have trouble implementing these, ask questions in the comments!

The exercises for this chapter can be found in chapter 2 of Nisan & Schocken.



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Tags:
ALU
Arithmetic Logic Unit
half-adder
full-adder
incremented
digital circuit design
two's complement notation
John Von Neumann