Duration: 1:07:25

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In my Ph.D. thesis, I propose mechanisms to address the inefficiency caused by existing memory abstractions, which manage and access memory at different granularities at different resources. In this talk, I will focus my attention on our mechanisms to accelerate certain memory operations using the DRAM technology. In today's systems, DRAM is used only as a storage device. Off-chip DRAM interfaces allow the memory controller to read and write data. In this line of work, we observe that this model is very inefficient for certain key primitives in modern systems. And we ask the question, can