Simple blink with FPGA

Channel:

Fredrik Andersson

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387

Published on January 9, 2016 10:36:32 PM ● Video Link: https://www.youtube.com/watch?v=VOZHTo7OYZM

Duration: 10:03

4,449 views

51

Bored and decided to try out Screenflows dual recording option.

Simple example to setup and program a WXEDA Altera Cyclone IV board from scratch using Quartus Prime 15.1 (The free edition)

Very simple verilog example that blinks a led based on a bit in a 32 bit counter. The counter is increased by 1 by a rate of 50Mhz- thus we only use a single bit (bit 22 in this case) of the counter to actually set the state of the actual led.

Also demonstrates how to convert the sof (sram object file) to a jic (JTAG indirect configuration file) to automatically have the FPGA cold boot with the design, the JIC upload is slower as noticeable as it programs the external flash chip the FPGA then retrieves it's configuration from upon cold boot. SOF is quick and good for development but is lost on power off.

Music was not intentional, I forgot I recorded computer audio- and was listening to spotify during the recording, which is why it's randomly cut off, and the fact it started so synchronized was absolute randomness. It's record is epicloud by devin townsend however.