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Today I talk about Intel vector registers and SIMD (Single Instruction Multiple Data) operations. I explain how the SSE, AVX and AVX-512 extensions work, which introduced the 128-bit XMM, 256-bit YMM and 512-bit ZMM registers respectively, allowing you to perform arithmetic operations on groups of data at the same time, instead of on single values as normally happens. During the video I also explain fundamental concepts such as memory alignment, the use of aligned_alloc functions instead of the classic malloc, and how to handle edge cases when the number of elements is not perfectly divisible by the capacity of the vector registers.
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VIDEO CA-25-011