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This is an audio version of the Wikipedia Article:
https://en.wikipedia.org/wiki/Reduced_instruction_set_computer


00:02:29 1 History and development
00:08:37 2 Characteristics and design philosophy
00:08:49 2.1 Instruction set philosophy
00:10:22 2.2 Instruction format
00:11:23 2.3 Hardware utilization
00:22:29 3 Comparison to other architectures
00:24:28 4 Use of RISC architectures
00:24:55 4.1 Low end and mobile systems
00:26:50 4.2 Workstations, servers, and supercomputers
00:28:17 5 See also



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- Socrates


SUMMARY
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A reduced instruction set computer, or RISC (), is one whose instruction set architecture (ISA) allows it to have fewer cycles per instruction (CPI) than a complex instruction set computer (CISC). Various suggestions have been made regarding a precise definition of RISC, but the general concept is that such a computer has a small set of simple and general instructions, rather than a large set of complex and specialized instructions. For this reason RISC is sometimes given the backronym 'Relegate Interesting Stuff to the Compiler'. Another common RISC trait is their load/store architecture, in which memory is accessed through specific instructions rather than as a part of most instructions.
Although a number of computers from the 1960s and '70s have been identified as forerunners of RISCs, the modern concept dates to the 1980s. In particular, two projects at Stanford University and the University of California, Berkeley are most associated with the popularization of this concept. Stanford's MIPS would go on to be commercialized as the successful MIPS architecture, while Berkeley's RISC gave its name to the entire concept and was commercialized as the SPARC. Another success from this era was IBM's effort that eventually led to the Power Architecture. As these projects matured, a wide variety of similar designs flourished in the late 1980s and especially the early 1990s, representing a major force in the Unix workstation market as well as for embedded processors in laser printers, routers and similar products.
The many varieties of RISC designs include ARC, Alpha, Am29000, ARM, Atmel AVR, Blackfin, i860, i960, M88000, MIPS, PA-RISC, Power ISA (including PowerPC), RISC-V, SuperH, and SPARC. In the 21st century, the use of ARM architecture processors in smartphones and tablet computers such as the iPad and Android devices provided a wide user base for RISC-based systems. RISC processors are also used in supercomputers such as Summit, which, as of November 2018, is the world's fastest supercomputer as ranked by the TOP500 project.