electric circuit equation writing , and c++ pointers combo
0recap ,...
using KVL , ohm's law , passive sign convention , Pattern based
equaiton writing , and General Loop currents . 1 supermesh circuit
analyzed in 4 ways .
to see my solution to the quadratic equation ,
see video on Casio fx-115ES Plus Calculator
it might seem superficial on the outside .
i am doing my first assembly language trivial code :
MOV A , 5
MOV B , 2
ADD A , B
the result is 7
cute , but what just happended ? somthing curious just happended. some deeper concept , i couldn't\didn't put my finger on it more studies . much , much later , i found out the missing
deeper idea . PN Infix RPN notations . the assembler code
was RPN . that was the concept that i was unaware of .
you would have thought the literature would have said something .
Nope ! Not a peep . sad , sad literature .
Consider the FULL concept and definitions and implementation of what RPN implies , to appreciate what i say .
Next ,
tech school books on circuit analysis are the same way .
that's why teachers in tech schools do NOT know how to do circuit analysis ,...Verified .
the books don't tell , and the teachers don't know either ,... Verified .
it is kind of tricky :
the tech school DC\AC books don't even come close .
very insufficiant informatin .
and no tech school , that i have ever seen , knows how to do it .
what a waste that is ,...a mess .
to Proof by Contradiction :
when we draw the mesh arroow "Direction" , or the
loop current arrow "Direction" . we have just Setup a
"Proof by Contradicton" scenario .
when
the numercial value for current is +pos , then the current
direction really is in the same direction as the drawn arrow .
when
the numerical value for curent is -neg , then the current
direction really is in the opposite direction of the drawn arrow .
No further analysis is required .
The same consideration applies to any pre-assigned +-polarities across any of the passive elements . +5 v says the +named node
really is more +pos then the -named node .
and ,
-2 v says :
the +named node really is more -neg then the -named node .
We understand the interpretation , no fufther analysis is required .
mesh currents ( Ia and Ib ) may have different numerical values
then the Loop currents ( L1 and L2 ) , because mesh and loop currents are definded differntly ,...however , the 3 branche currents will Always have the same numercial values regarless of wether mesh or loop analysis was used ,...
thus the Vdrops across all the passive elements will be the same , regardless of wether mesh or loop analysis was used .
analogy to a Rope :
a rope's length can be made of segments , add all segments to
get the rope lenght ( KVL ) .
it might be that each rope segment is made up of factors , I*s
a "kind of" Ohm's Law "Rope's Law" , so
summing to get total rope length is a little more complicated .
Back to an electric circuit , the Mesh Arrow's , always drawn Clock Wise , gives a Vdrop across Every passive element , for Every Mesh Arrow . suggests that all the passive elements in each mesh will be in the nature of +pos ohms law( even if a +-polarity had been assigned to the passive elements ) . Shared passive elements have multiple mesh arrows , in opposite directions .
the shared passive element will be +pos for it's mesh arrow , while -neg for the adjacnet mesh arrow ( the adjacent mesh arrow is in the opposte direction thru the shared element ) . this intuitively explains the final format shown in this Video . I wish the Books were more explicit , on this topic .
quantatively and with equations , instead of just Jumping to the
Pattern .
const keyword provies 2 things :
Type , with our Constants
and we can protect , at compile time , our Constants ,
for inadvertent assignment .
Never use #define to make a Constant .
#define's have No Type and No Size Type checking .
we could make a #define Constant of 50,000 and
assign= 50,000 to a char byte ( bug ! )
but a const short int of 50,000 compile-time assignment=
to a char byte , will find the miss-match and compile will fail
( the compiler found the bug for us )
i have nothing more to say on the topics presented here .
i have made it as explicit as i can .
electronic circuit analysis