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Logic gates \( X \) and \( Y \) have the truth tables shown below:
\( \mathrm{P} \)
W
\begin{tabular}{|c|c|c|c|c|}
\hline\( P \) & \( Q \) & \( R \) & \( A \) & \( B \) \\
\hline 0 & 0 & 0 & 0 & 1 \\
\hline 1 & 0 & 0 & 1 & 0 \\
\hline 0 & 1 & 0 & & \\
\hline 1 & 1 & 1 & & \\
\hline
\end{tabular}
When the output of \( X \) is connected to the input of \( Y \), the resulting combination is equivalent to a single:
(1) NOT gate
(2) OR gate
(3) NAND gate
(4) AND gate
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