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FDxICSP 1.0 has been tested on many MCU and while it works universally with all of them, it's not very stable at highest bps. Timing is happening at multiple levels. We have Serial clock, SPI sck, the host maximize wait time, serial over-flow at high pbs, target MCU flash wait time, and etc. FDxICSP 1.0 is not coded to handle the timing rapidly enough that it's not working very stable at highest transfer rate. It's easy to stay mediocre.

Each of the above timing can not be wrong. Especially that it's not valid to write to flash buffer while its flash page is still being written to.